Y indicates that the flip-flop has a synchronous reset (SR) and a synchronous set (SS).The inference report in the above example consists of two sections - the first section contains tables of the inferenced registers and three-state devices, and the second section reports detailed register behavior. | Q_reg | Flip-flop | 1 | - | N | N | Y | Y | Y | ![]() | Register Name | Type | Width | Bus | AR | AS | SR | SS | ST | Example 6-1: Inference Report for JK Flip-flop The inference report appears on the Messages page of the output window for a pre-optimized chip. The following example shows the inference report for a JK flip-flop.
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